Deliverables

ENOSYS Public Deliverables

The ENOSYS project has completed a number of deliverables which can be downloaded from the project wedsite. These deliverables are reports that cover different areas, from analyses of the state-of-the-art practices and tools for the design of embedded systems to detailed descriptions of the ENOSYS design flow.

All ENOSYS public deliverables can be accessed through the Download page of the ENOSYS website. Follow the instructions provided on that page to join the Download group.

The following is a list of the deliverables which are currently available.

Deliverable 2.1: State-of-the-Art Analysis for Embedded Systems Design

This document records and categorises current embedded system design practices and tools. Using as a basis the different system modelling approaches and stages to hardware synthesis, this document
  • Classifies existing embedded system design methodologies with respect to the path taken from high-level definition to silicon implementation;
  • Reviews commercial and academic tools which support mapping of high-level descriptions to software and hardware (silicon IP). The reviews focus on the capabilities of each tool to address hardware and software synthesis, and to implement design space exploration; and
  • Lists contemporary tools supporting a state-of-the-art design flow and addresses the specific areas of capture of behaviour, optimisation through high-level source transformations and IP re-use.
Check Download page.

Deliverable 2.2: The ENOSYS Design Flow for the Modelling and Synthesis of Embedded Systems (Preliminary Version)

This document details the full ENOSYS design flow, from UML design entry all the way to implementation on silicon. It is an initial document focused on the preliminary version of the ENOSYS design flow which outlines flows, tool exchange points and the programmer's model of the LE1 multicore engine. It also includes outline descriptions of the silicon platform and design space exploration - developed as part of the ENOSYS project.

Check Download page.

Deliverable 2.3: Methodology for Code Optimization using Transformations

This document describes the methodology and implementation of ACOT (Application Code Optimization Tool) developed in the ENOSYS project by the University of Peloponnese. ACOT targets the optimizations of memory data transfers that occur during the program operations between the processing units (programmable processor, hardware accelerator) and memory system.  Optimizing memory operation can result in better overall system performance and lower power consumption.
ACOT is a compiler framework consisting of multiple tools that provide analysis and automatic transformation of the application's source code. Analysis of the source code is applied both prior an dafter the optimization to identify opportunities and quantify the improvement by a given type of transformation.

Check Download page.

Deliverable 2.4: The Design Space Exploration Methodology

This document describes the development of the design space exploration aspects of the ENOSYS flow. It reviews the approach used in the Jink Design Space Explorer (DSE) developed by Loughborough University for automated hardware-software partitioning and co-design. The development process covers the initial steps used to validate a complete flow from UML models through the various tools to silicon or embedded processors with either a pure hardware or software flow. These stages are used as a basis for developing the automation, allocation and exploration capabilities included in Jink DSE. A case study is used to investigate the use of the ENOSYS flow (software, hardware) targetting the LE1 processor.

Check Download page.