By understanding the weaknesses and trends in current processes, this proposal builds a complete model-driven engineering approach for embedded systems design that takes advantage of standard modelling languages and existing state-of-the-art tool support, while developing new concepts, tools and methodologies for design synthesis, co-design and verification. The aim of the ENOSYS project is to specify and develop a tool supported design flow for designing and implementing embedded systems by seamless integration of high-level system specifications, software code generation, hardware synthesis and design space exploration. The ENOSYS project will provide an integrated workbench combining SysML, MARTE and FalconML. The OMG SysML and MARTE will be evaluated and extended to address end-user demands and requirements for integration. The approach and the tool flow will be evaluated and validated with representative scenarios from the telecoms domain. The results will be reported and presented at OMG in order to influence standardization and improve opportunities for adoption. The specific scientific and technological (S&T) objectives of the ENOSYS project are:
ENOSYS has the following market and outreach (M&O) objectives:
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