ENOSYS project‎ > ‎


By understanding the weaknesses and trends in current processes, this proposal builds a complete model-driven engineering approach for embedded systems design that takes advantage of standard modelling languages and existing state-of-the-art tool support, while developing new concepts, tools and methodologies for design synthesis, co-design and verification.

The aim of the ENOSYS project is to specify and develop a tool supported design flow for designing and implementing embedded systems by seamless integration of high-level system specifications, software code generation, hardware synthesis and design space exploration.

The ENOSYS project will provide an integrated workbench combining SysML, MARTE and FalconML. The OMG SysML and MARTE will be evaluated and extended to address end-user demands and requirements for integration. The approach and the tool flow will be evaluated and validated with representative scenarios from the telecoms domain. The results will be reported and presented at OMG in order to influence standardization and improve opportunities for adoption.

The specific scientific and technological (S&T) objectives of the ENOSYS project are:
  • S&T Objective 1: Develop MARTE extensions that address the needs for capturing high level specification and for design synthesis;
  • S&T Objective 2: Integrate the MARTE profile into the existing tool flow, permitting the automatic generation of SystemC and the hardware synthesis of HDL;
  • S&T Objective 3: Develop the means for the rapid and automated determination of near-optimal embedded system implementations using design space exploration;
  • S&T Objective 4: Develop the tool support required for seamless software/hardware co-design;
  • S&T Objective 5: Integrate the modelling and design synthesis tools of two leading European SME tool vendors and the methodologies of two universities in a common and seamless workbench.

ENOSYS has the following market and outreach (M&O) objectives:
  • M&O Objective 1: Shortened time-to-market for high-performance embedded SoCs;
  • M&O Objective 2: Provide modelling language extensions in open source to ensure an integration route for European SME tool providers;
  • M&O Objective 3: Validate the ENOSYS results by providing two embedded system example implementations (case studies) implemented by the industrial participants;
  • M&O Objective 4: Influence standardization and adoption of MARTE standard.