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ENOSYS present at ESC Silicon Valley 2010; 26th-29th April 2010, San Jose, USA.

posted 23 Apr 2010, 02:12 by Andrey Sadovykh

The ENOSYS project  (intEgrated modelliNg and synthesis tOol flow for embedded SYStems design) will be represented at ESC Silicon Valley 2010 by one of the project participants, Axilica Limited.


Axilica will be exhibiting at ESC - stand 2206 - and, in addition to demonstrating its product FalconML, will be providing information on the integrated design flow for the development of embedded SOC devices to be implemented in ENOSYS.


ENOSYS is a project funded under the European Commission’s FP7 Program and focuses on an integrated design flow including advanced system modelling, design space exploration and hardware/software synthesis of SoC systems. Axilica’s product, FalconML, is one of the core technologies to be used in the ENOSYS integrated workbench and will be enhanced to deliver the hardware system behavioral synthesis capabilities required in this workbench.


Visit Axilica at ESC Silicon Valley – stand 2206 - for further information on ENOSYS, its objectives and on the integrated design flow being developed under the project.  See a demonstration of FalconML highlighting the capabilities that will underpin Axilica’s contribution to ENOSYS.